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Refurbished Intel Xeon server processor, silver heat spreader with gold contacts

IBM Refurbished

IBM 69Y5685 Xeon E5-2650L 8-Core 1.8GHz 20MB L3 70W Server Processor

SKU CH-425K-KE26P MPN 69Y5685

Eight-core Xeon server processor running at 1.8 GHz with 20 MB L3 cache and 70 W TDP for DDR3 1600 memory

  • Supported memory speedDDR3 1600
  • 8 cores handle parallel workloads with 1.8 GHz base frequency
  • 20 MB L3 cache reduces latency for data-intensive applications
  • 70 W TDP lowers power draw in dense server deployments
  • DDR3 1600 memory controller supports high-speed registered modules

Refurbished Xeon E5-2650L for X3550 M4

This refurbished IBM server processor is an eight-core Xeon E5-2650L running at 1.8 GHz with 20 MB of L3 cache. It fits the FCLGA2011 socket and has a 70 W thermal design power. The part is validated specifically for the X3550 M4 server platform.

DDR3-1600 memory controller requirement

The integrated memory controller operates at DDR3-1600 speed, so the system must use DDR3 modules at that rate. Buyers needing a different memory generation or a higher controller frequency cannot use this processor.

How it compares

Measured against everything we stock in Server Processors, at today’s prices. Recalculated every night.

Price $497.99
Cheaper than about 74% of the 621 comparable items (median $1,561.99).

New to this? Buying a processor with crypto — what to check, what it costs to pay, and what is never asked for.

Specifications

Memory
Supported memory speedDDR3 1600
Size & build
Shipping weight0.91 kg
Package size127 × 127 × 51 mm

Questions about this item

What does the 1.8 GHz clock speed mean for real-world server workloads?

The 1.8 GHz base frequency runs across eight cores within a 70 W power envelope, giving steady throughput for virtualisation and database tasks without exceeding the thermal limits of the X3550 M4 chassis.

What does the 8 GT/s QPI link cap in a dual-socket X3550 M4?

The 8 GT/s QPI interconnect sets the maximum data rate between the two sockets, so memory bandwidth and cache coherency traffic cannot exceed that link speed in a dual-processor configuration.

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