Kingston Technology Corp. KSM48R40BD8KMM-32HMR 32GB DDR5 4800 CL40 ECC Registered Server RAM
- 32 GB
- DDR5 4800
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16 GB DDR5 server memory module running at 4800 MHz with CL40 latency, registered design and on-die ECC for data integrity
Capacity 16GB
Rank 1Rx8
Model Hynix, DRAM Lock
This 16 GB DDR5 module runs at 4800 MHz with CL40 latency and 1.10 V operation. It uses a 288-pin DIMM form factor and includes on-die ECC with registered signal processing. The single-rank design supports Intel XMP 2.0 profiles for compatible platforms.
Suited for systems that require registered memory with error correction, such as multi-socket servers or ECC-dependent workloads. Not suited for consumer desktop boards that accept only unbuffered non-ECC modules or that lack registered DIMM support.
Provides 16 GB per slot, allowing higher total memory when multiple DIMMs are populated on a supported motherboard. Headroom depends on the platform's maximum DIMM count and memory controller limits; single-rank organisation helps signal integrity at higher population densities.
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| Product | |
|---|---|
| Brand name | Kingston |
| Model name | KSM48R40BS8-16HA |
| Total capacity | 16 GB |
| Product type | 288-Pin DDR5 SDRAM |
| Performance | |
| Rated speed | DDR5 4800 (PC5 38400) |
| Memory | |
| CAS latency | CL40 |
| ECC support | Yes |
| Buffer type | Registered |
| Memory rank | 1Rx8 |
| Memory profiles | Intel XMP 2.0 |
| Heat spreader | No |
| Power | |
| Rated voltage | 1.1 V |
| Size & build | |
| Shipping weight | 0.02 kg |
| Package size | 163 × 46 × 8 mm |
Other versions of this model
Yes, the KSM48R40BS8-16HA is a registered DDR5 DIMM with 288 pins and requires a compatible server platform that supports registered memory at 1.10 V.
Mixing ranks is possible on many server boards, but the system will run all modules at the lowest common speed and latency; check your motherboard manual for qualified population rules.
Enter the BIOS or use a tool like CPU-Z to verify the memory reports 4800 MT/s, CL40 timings, 1.10 V, and registered ECC operation.
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