OWC 256GB (2x128GB) DDR5 5200 PC5-41600 CL42 4Rx4 288-pin 1.1V ECC Registered RDIMM server RAM
- 256 GB (2 × 128 GB)
- DDR5 5200
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A dual-channel kit delivering 256 GB of DDR5 4800 ECC registered RDIMM memory for compatible servers and workstations
Capacity 256GB (2 x 128GB)
Rank 4Rx4
This OWC kit provides 256 GB of DDR5 registered ECC memory in a matched pair of 128 GB modules. It is built for workstations and servers that require registered DIMMs with error correction. Standard desktop platforms cannot use this memory. Mixing with unbuffered or load-reduced DIMMs is not supported.
Each module uses the 288-pin DDR5 form factor and operates at 1.1 V with a CL40 latency. The registered design adds a buffer that reduces electrical load on the memory controller, which is essential for high-capacity server configurations. No heat spreaders are fitted, so airflow in the chassis must be sufficient for the bare modules.
The kit runs at DDR5 4800 (PC5-38400) with a 4Rx4 organisation, delivering the baseline JEDEC data rate for DDR5 registered memory. This speed is fixed by the module SPD and cannot be increased without platform support for higher JEDEC profiles. Buyers needing faster rated speeds must select modules specified for those higher grades.
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| Product | |
|---|---|
| Brand name | OWC |
| Part number | 4R8D54R4256P |
| Total capacity | 256 GB (2 × 128 GB) |
| Product type | 288-Pin DDR5 ECC RDIMM |
| Performance | |
| Rated speed | DDR5 4800 (PC5 38400) |
| Memory | |
| CAS latency | CL40 |
| ECC support | Yes |
| Buffer type | Registered |
| Memory rank | 4Rx4 |
| Kit configuration | Dual Channel Kit |
| Heat spreader | No |
| Power | |
| Rated voltage | 1.1 V |
Other versions of this model
The modules operate at DDR5 4800 (PC5-38400) with a CAS latency of CL40, matching the JEDEC standard for this speed grade.
Each module uses a 288-pin DDR5 RDIMM form factor and requires a registered-DIMM slot on a compatible workstation or server motherboard.
Populate one module per memory channel following the motherboard's channel map; do not mix these registered ECC DIMMs with unbuffered or load-reduced memory.
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